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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 18:46:51 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 12:44:04 +0000
commit96dec04207604fdd58ab2f76f8667542c03902e4 (patch)
treeec3d7474d6bf16f86097685d08003719524bbfc9 /src/soc/intel/braswell/pcie.c
parentf7c551cf6efe103688bb39563a7dca692431d766 (diff)
soc/intel/braswell: Drop some BIOS_SPEW printk's
This reduces the differences between Bay Trail and Braswell. Change-Id: I60e4db72eed17cdeebd30b010f351e1ffc4187e3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43182 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/soc/intel/braswell/pcie.c')
-rw-r--r--src/soc/intel/braswell/pcie.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/intel/braswell/pcie.c b/src/soc/intel/braswell/pcie.c
index c0cf5e4b98..6a719e78a9 100644
--- a/src/soc/intel/braswell/pcie.c
+++ b/src/soc/intel/braswell/pcie.c
@@ -28,7 +28,6 @@ static inline int is_first_port(struct device *dev)
static void pcie_init(struct device *dev)
{
- printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev));
}
static const struct reg_script no_dev_behind_port[] = {
@@ -42,9 +41,6 @@ static void check_port_enabled(struct device *dev)
{
int rp_config = (strpfusecfg & LANECFG_MASK) >> LANECFG_SHIFT;
- printk(BIOS_SPEW, "%s/%s (%s)\n",
- __FILE__, __func__, dev_name(dev));
-
switch (root_port_offset(dev)) {
case PCIE_PORT1_FUNC:
/* Port 1 cannot be disabled from strapping config. */
@@ -83,8 +79,6 @@ static void check_device_present(struct device *dev)
static uint32_t rootports_in_use = MAX_ROOT_PORTS_BSW;
- printk(BIOS_SPEW, "%s/%s (%s)\n",
- __FILE__, __func__, dev_name(dev));
/* Set slot implemented. */
pci_write_config32(dev, XCAP, pci_read_config32(dev, XCAP) | SI);
@@ -121,8 +115,6 @@ static void check_device_present(struct device *dev)
static void pcie_enable(struct device *dev)
{
- printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev));
-
if (is_first_port(dev)) {
struct soc_intel_braswell_config *config = config_of(dev);
uint32_t reg = pci_read_config32(dev, PHYCTL2_IOSFBCTL);