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authorLee Leahy <leroy.p.leahy@intel.com>2015-04-20 15:20:28 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2015-06-25 21:50:48 +0200
commit32471729d9ebbabe809711ec55568925c6ce2070 (patch)
treeb9f6db4e4969ee5edd6c2571e4f7612121070a9f /src/soc/intel/braswell/microcode
parent5fe62efb77a2ecfeecdcc526404712b816e74693 (diff)
Braswell: Add Braswell SOC support
Add the files to support the Braswell SOC. BRANCH=none BUG=None TEST=Build for a Braswell platform Change-Id: I968da68733e57647d0a08e4040ff0378b4d59004 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10051 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/braswell/microcode')
-rw-r--r--src/soc/intel/braswell/microcode/Makefile.inc14
-rw-r--r--src/soc/intel/braswell/microcode/microcode_blob.c21
2 files changed, 33 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/microcode/Makefile.inc b/src/soc/intel/braswell/microcode/Makefile.inc
index 09bd454ce0..936dd85330 100644
--- a/src/soc/intel/braswell/microcode/Makefile.inc
+++ b/src/soc/intel/braswell/microcode/Makefile.inc
@@ -1 +1,13 @@
-cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
+# Add CPU uCode source to list of files to build.
+cpu_microcode-y += microcode_blob.c
+
+# This section overrides the default build process for the microcode to place
+# it at a known location in the CBFS. This only needs to be enabled if FSP is
+# being used.
+# Define the correct offset for the file in CBFS
+fsp_ucode_cbfs_base = $(CONFIG_CPU_MICROCODE_CBFS_LOC)
+
+# Override the location that was supplied by the core code.
+add-cpu-microcode-to-cbfs = \
+ $(CBFSTOOL) $(1) add -n $(cpu_ucode_cbfs_name) -f $(cpu_ucode_cbfs_file) -t 0x53 -b $(fsp_ucode_cbfs_base)
+
diff --git a/src/soc/intel/braswell/microcode/microcode_blob.c b/src/soc/intel/braswell/microcode/microcode_blob.c
index 7c7b6f10b6..bcadcfe104 100644
--- a/src/soc/intel/braswell/microcode/microcode_blob.c
+++ b/src/soc/intel/braswell/microcode/microcode_blob.c
@@ -1,3 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
unsigned microcode[] = {
-#include "../../../../../3rdparty/soc/intel/baytrail/microcode_blob.h"
+#include <microcode_blob.h>
};