aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell/lpe.c
diff options
context:
space:
mode:
authorMatt DeVillier <matt.devillier@gmail.com>2018-01-21 16:37:24 -0600
committerMartin Roth <martinroth@google.com>2018-03-06 22:32:13 +0000
commit83ef07a92a9c6143fe67417ed98d475a6612ca9c (patch)
treeb1fed5d2850805f7becad2ca00fe627d69e144ce /src/soc/intel/braswell/lpe.c
parent7440cc881c7fbbcb0f2ceab6a175aa0444f757fa (diff)
soc/intel/braswell: increase LPEA fw allocation to 2MiB
Increase memory allocated for the LPEA firmware from 1MiB to 2MiB to match Intel CHT reference code and fix Windows functionality. Test: boot Windows on google/edgar, observe no error in Device Manager for LPEA audio device due to BAR2 resource allocation. Change-Id: I7cffcdd83a66a922c2454488c8650df03c9f5097 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/24986 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/braswell/lpe.c')
-rw-r--r--src/soc/intel/braswell/lpe.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c
index 58b5a8d77f..8ec944bed5 100644
--- a/src/soc/intel/braswell/lpe.c
+++ b/src/soc/intel/braswell/lpe.c
@@ -38,7 +38,7 @@
* address. Just take 1MiB @ 512MiB.
*/
#define FIRMWARE_PHYS_BASE (512 << 20)
-#define FIRMWARE_PHYS_LENGTH (1 << 20)
+#define FIRMWARE_PHYS_LENGTH (2 << 20)
#define FIRMWARE_PCI_REG_BASE 0xa8
#define FIRMWARE_PCI_REG_LENGTH 0xac
#define FIRMWARE_REG_BASE_C0 0x144000