diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-03-19 00:31:58 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-23 09:42:39 +0000 |
| commit | aee7ab2f6e69b70414f8225cb7a83c3e4cb62d9a (patch) | |
| tree | 73a8668b87d5e495041b67f5f799e40386230bab /src/soc/intel/braswell/lpc_init.c | |
| parent | 140a4ae7bf2960ac7d095ba94847093f4755bf04 (diff) | |
soc/intel/braswell: Clean up
Tested with BUILD_TIMELESS=1, Facebook FBG1701 remains unaffected.
Change-Id: I784a5ddc1a8dcbfb960ce970b28b850244a47773
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39663
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/lpc_init.c')
| -rw-r--r-- | src/soc/intel/braswell/lpc_init.c | 49 |
1 files changed, 24 insertions, 25 deletions
diff --git a/src/soc/intel/braswell/lpc_init.c b/src/soc/intel/braswell/lpc_init.c index bf5807464d..8b7c1eab34 100644 --- a/src/soc/intel/braswell/lpc_init.c +++ b/src/soc/intel/braswell/lpc_init.c @@ -50,48 +50,47 @@ static void lpc_gpio_config(u32 cycle) { if (cycle == SUSPEND_CYCLE) { /* Suspend cycle */ - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_FRAME_MMIO_OFFSET), + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_FRAME_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD0_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD0_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD1_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD1_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD2_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD2_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD3_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD3_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_CLKRUN_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_CLKRUN_MMIO_OFFSET), PAD_CFG0_NATIVE_PD20K(1)); + } else { /* Resume cycle */ - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_FRAME_MMIO_OFFSET), + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_FRAME_MMIO_OFFSET), PAD_CFG0_NATIVE_M1); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD0_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD0_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD1_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD1_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD2_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD2_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_AD3_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_AD3_MMIO_OFFSET), PAD_CFG0_NATIVE_PU20K(1)); - write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + - LPC_CLKRUN_MMIO_OFFSET), + + write32((void *)(COMMUNITY_GPSOUTHEAST_BASE + LPC_CLKRUN_MMIO_OFFSET), PAD_CFG0_NATIVE_M1); } } /* - * configure LPC GPIO lines for low power + * Configure LPC GPIO lines for low power */ void lpc_set_low_power(void) { |