diff options
| author | Jian Tong <tongjian@huaqin.corp-partner.google.com> | 2024-09-04 10:46:34 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-09-25 12:28:40 +0000 |
| commit | 658e274b9f19663651882e41b1bc114e85186ffa (patch) | |
| tree | 5095a9ac72291518365cad33b1e5763b87233016 /src/soc/intel/braswell/iosf.c | |
| parent | 91990ae11e45feb3c88539eedc19b2ff4b35caac (diff) | |
mb/google/brox/var/lotso: Update cpu power limits
When battery not present, increase PL4 limit from 9 to 40.
Get PL setting from internal thermal and power team.
AC+DC/DC:
PL1=15W
PL2=25W
PL4=114W
AC ONLY:
PL1=15W
PL2=25W
PL4=40W
BUG=b:355094551
TEST=emerge-brox sys-boot/coreboot sys-boot/chromeos-bootimage
Confirm on lotso EVT board, as expected.
Change-Id: I5848c776399a1bdc455db604bb3b22d16f6b2928
Signed-off-by: Jian Tong <tongjian@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84202
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/iosf.c')
0 files changed, 0 insertions, 0 deletions