summaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell/include
diff options
context:
space:
mode:
authorAamir Bohra <aamir.bohra@intel.com>2019-05-29 13:33:32 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-06-20 08:48:54 +0000
commitb09de70eda443d2fc9f4891c7647aac4526a8e99 (patch)
tree10398c003333c656c1ccf538f53870b8b301cbaf /src/soc/intel/braswell/include
parent685b377e7e56ed6a046204baf73c43d76a87f4b4 (diff)
mb/google/hatch: Remove unused USB2 port5 from baseboard devicetree
Hatch newer board revision do not use USB port5 for discrete BT. Hence remove the port configuration and UBS2 P5 asl entry. The older board version would continue to use USB2 P5 hence moved the entry to overridetree.cb Change-Id: I98297d6b81e3184b7b0a14710f3790f5df30d68b Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/braswell/include')
0 files changed, 0 insertions, 0 deletions