diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2015-08-05 17:01:55 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-14 19:17:01 +0100 |
| commit | 45a221de7923d6c1d52f9ca14a3419e7d0803636 (patch) | |
| tree | e3f742125a2939b6a035720ccb2b5820934b375c /src/soc/intel/braswell/include | |
| parent | baf00e6b28efcf02497a566fa6f0f43d11304406 (diff) | |
soc/braswell: Fix P-state table
Incorrect bus-core-ratio been used to generate P-state table
Original-Reviewed-on: https://chromium-review.googlesource.com/290681
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I4a34ec80ff3f2ed46dc074c9f8fe06756db8b357
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/12731
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/braswell/include')
| -rw-r--r-- | src/soc/intel/braswell/include/soc/msr.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/braswell/include/soc/pattrs.h | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/include/soc/msr.h b/src/soc/intel/braswell/include/soc/msr.h index 93701aad75..d998e68dd8 100644 --- a/src/soc/intel/braswell/include/soc/msr.h +++ b/src/soc/intel/braswell/include/soc/msr.h @@ -43,6 +43,7 @@ #define MSR_CPU_THERM_CFG2 0x674 #define MSR_CPU_THERM_SENS_CFG 0x675 -#define BUS_FREQ_KHZ 100000 /* 100 MHz */ +/* Read BCLK from MSR */ +unsigned int cpu_bus_freq_khz(void); #endif /* _SOC_MSR_H_ */ diff --git a/src/soc/intel/braswell/include/soc/pattrs.h b/src/soc/intel/braswell/include/soc/pattrs.h index 439d0bd8d9..d86f9ee98e 100644 --- a/src/soc/intel/braswell/include/soc/pattrs.h +++ b/src/soc/intel/braswell/include/soc/pattrs.h @@ -44,7 +44,7 @@ struct pattrs { const void *microcode_patch; int address_bits; int num_cpus; - unsigned bclk_khz; + unsigned int bclk_khz; }; /* |