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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-14 05:41:41 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-15 06:55:59 +0000
commitfaf20d30a6e451d45e29613e3f4603dc72771843 (patch)
treed1c3df6e87473d66633fb3a4a8cec736fdda2cd7 /src/soc/intel/braswell/cpu.c
parentf091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (diff)
soc/intel: Rename some SMM support functions
Rename southbridge_smm_X to smm_southbridge_X. Rename most southcluster_smm_X to smm_southbridge_X. Change-Id: I4f6f9207ba32cf51d75b9ca9230e38310a33a311 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34856 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/cpu.c')
-rw-r--r--src/soc/intel/braswell/cpu.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 1b1548ad6d..72b1d8ee89 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -18,7 +18,9 @@
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/intel/common/common.h>
+#include <cpu/intel/em64t100_save_state.h>
#include <cpu/intel/microcode.h>
+#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
@@ -26,7 +28,6 @@
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
-#include <cpu/intel/em64t100_save_state.h>
#include <reg_script.h>
#include <soc/iosf.h>
#include <soc/msr.h>
@@ -217,10 +218,10 @@ static const struct mp_ops mp_ops = {
.get_cpu_count = get_cpu_count,
.get_smm_info = get_smm_info,
.get_microcode_info = get_microcode_info,
- .pre_mp_smm_init = southcluster_smm_clear_state,
+ .pre_mp_smm_init = smm_southbridge_clear_state,
.per_cpu_smm_trigger = per_cpu_smm_trigger,
.relocation_handler = relocation_handler,
- .post_mp_init = southcluster_smm_enable_smi,
+ .post_mp_init = smm_southbridge_enable_smi,
};
void soc_init_cpus(struct device *dev)