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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-16 17:30:09 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-17 02:35:47 +0100
commit6598b91fe34fe9e6e6fbea592ead5e4fc2900551 (patch)
tree42b70feec4183be3a87249d73565bb1a56c1c5e6 /src/soc/intel/braswell/chip.h
parentf4c4ab9826b521666d5ba887e69a636428ac9eb2 (diff)
soc/intel/braswell: Fix spacing issues detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl: ERROR: space required after that ',' (ctx:VxV) ERROR: space prohibited before that ',' (ctx:WxE) ERROR: spaces required around that '=' (ctx:WxV) ERROR: code indent should use tabs where possible WARNING: space prohibited between function name and open parenthesis '(' WARNING: please, no spaces at the start of a line TEST=Build for cyan Change-Id: I84d4204585b498b695608c5008fdfb7961e2416f Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18869 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/braswell/chip.h')
-rw-r--r--src/soc/intel/braswell/chip.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h
index 864f214008..fc57a6a95d 100644
--- a/src/soc/intel/braswell/chip.h
+++ b/src/soc/intel/braswell/chip.h
@@ -34,8 +34,8 @@
#define MEM_LPDDR3 1
enum lpe_clk_src {
- LPE_CLK_SRC_XTAL,
- LPE_CLK_SRC_PLL,
+ LPE_CLK_SRC_XTAL,
+ LPE_CLK_SRC_PLL,
};
enum usb_comp_bg_value {
@@ -74,10 +74,10 @@ struct soc_intel_braswell_config {
int pcie_wake_enable;
/* Program USB2_COMPBG register.
- * [10:7] - select vref to AFE port
- * x111 - 575mV, x110 - 650mV, x101 - 550mV, x100 - 537.5mV,
- * x011 - 625mV, x010 - 700mV, x001 - 600mV, x000 - 675mV
- */
+ * [10:7] - select vref to AFE port
+ * x111 - 575mV, x110 - 650mV, x101 - 550mV, x100 - 537.5mV,
+ * x011 - 625mV, x010 - 700mV, x001 - 600mV, x000 - 675mV
+ */
enum usb_comp_bg_value usb_comp_bg;