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authorMatt DeVillier <matt.devillier@gmail.com>2017-08-26 04:47:15 -0500
committerMartin Roth <martinroth@google.com>2017-09-08 21:09:05 +0000
commit143a836e5a9708de77133d99aa5719780c3f9596 (patch)
treecefc789d1eb9eee84e566567f76cc41c08877f7b /src/soc/intel/braswell/chip.h
parent0c68530f15df0f027adb664cca0c3fcf0de2233a (diff)
soc/intel/braswell: Add SoC stepping identify helper
Adapted from Chromium commit 9756af8. Add SOC helper to identify BSW SoC stepping. Will be used to override USB2 phy setting based on stepping in subsequent commit. Original-Change-Id: Ic736dd945f01cf9f24af4ce3bd3f2757abfdeb2e Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Keith Tzeng <keith.tzeng@quantatw.com> Change-Id: Ib2371f85ea84df4b417e25ec8840d317cd918d5f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/21371 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/braswell/chip.h')
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