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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-30 11:28:42 +0100
committerNico Huber <nico.h@gmx.de>2019-11-04 13:19:42 +0000
commit1644e4898535918dcd3f0225792b63a4441bda91 (patch)
tree2831f418d21bba1c109f73b8dec7c3514171b995 /src/soc/intel/braswell/acpi
parent4ec67fc82cfcd6f9483e00215156a2296a44566e (diff)
sb/intel: Use defined CONFIG_HPET_ADDRESS
Change-Id: I15ae5e70ba351e89d5ea9d04dbb1efdfbb372bba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36458 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/braswell/acpi')
-rw-r--r--src/soc/intel/braswell/acpi/lpc.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index 9caa8f17eb..a8604d6c68 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -71,7 +71,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
})
}
#endif