diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-04-20 15:20:28 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-06-25 21:50:48 +0200 |
| commit | 32471729d9ebbabe809711ec55568925c6ce2070 (patch) | |
| tree | b9f6db4e4969ee5edd6c2571e4f7612121070a9f /src/soc/intel/braswell/acpi/dptf/thermal.asl | |
| parent | 5fe62efb77a2ecfeecdcc526404712b816e74693 (diff) | |
Braswell: Add Braswell SOC support
Add the files to support the Braswell SOC.
BRANCH=none
BUG=None
TEST=Build for a Braswell platform
Change-Id: I968da68733e57647d0a08e4040ff0378b4d59004
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10051
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/braswell/acpi/dptf/thermal.asl')
| -rw-r--r-- | src/soc/intel/braswell/acpi/dptf/thermal.asl | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/braswell/acpi/dptf/thermal.asl b/src/soc/intel/braswell/acpi/dptf/thermal.asl index 7113215cd3..b123fb6d79 100644 --- a/src/soc/intel/braswell/acpi/dptf/thermal.asl +++ b/src/soc/intel/braswell/acpi/dptf/thermal.asl @@ -60,12 +60,12 @@ Device (TSR0) Method (_PSV) { - Return (^^CTOK (DPTF_TSR0_PASSIVE)) + Return (CTOK (DPTF_TSR0_PASSIVE)) } Method (_CRT) { - Return (^^CTOK (DPTF_TSR0_CRITICAL)) + Return (CTOK (DPTF_TSR0_CRITICAL)) } Name (PATC, 2) @@ -116,12 +116,12 @@ Device (TSR1) Method (_PSV) { - Return (^^CTOK (DPTF_TSR1_PASSIVE)) + Return (CTOK (DPTF_TSR1_PASSIVE)) } Method (_CRT) { - Return (^^CTOK (DPTF_TSR1_CRITICAL)) + Return (CTOK (DPTF_TSR1_CRITICAL)) } Name (PATC, 2) @@ -172,12 +172,12 @@ Device (TSR2) Method (_PSV) { - Return (^^CTOK (DPTF_TSR2_PASSIVE)) + Return (CTOK (DPTF_TSR2_PASSIVE)) } Method (_CRT) { - Return (^^CTOK (DPTF_TSR2_CRITICAL)) + Return (CTOK (DPTF_TSR2_CRITICAL)) } Name (PATC, 2) |