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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-10 16:45:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-26 10:52:21 +0000
commitae1b2d49cf0ad09ff8f1e3904a9e7b23d6fb423b (patch)
tree41a0e28f6df404725371c5d5c57162bd9f9653d8 /src/soc/intel/braswell/acpi.c
parentddc37d69cb29327217151bd15a906177bc7949de (diff)
soc/intel: Introduce ioapic_get_sci_pin()
According to ACPI Release 6.5 systems supporting PIC (i8259) interrupt mechanism need to report IRQ vector for the SCI_INT field. In PIC mode only IRQ0..15 are allowed hardware vectors. This change should cover section 5.2.9 to not pass SCI_INT larger than IRQ15. Section 5.2.15.5 needs follow-up work. Care should be taken that ioapic_get_sci_pin() is called after platform code has potentially changed the routing from the default. It appears touched all platforms except siemens/mc_aplX currently program SCI as IRQ9. Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/braswell/acpi.c')
-rw-r--r--src/soc/intel/braswell/acpi.c52
1 files changed, 21 insertions, 31 deletions
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 1927421b40..0ea54b8679 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -81,14 +81,21 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN;
}
-int acpi_sci_irq(void)
+static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
+{
+ if (sci_irq >= 20)
+ return MP_IRQ_POLARITY_LOW;
+ else
+ return MP_IRQ_POLARITY_HIGH;
+}
+
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
+ int sci_irq = ACPI_SCI_IRQ;
int scis;
- static int sci_irq;
-
- if (sci_irq)
- return sci_irq;
/* Determine how SCI is routed. */
scis = read32(actl) & SCIS_MASK;
@@ -105,13 +112,15 @@ int acpi_sci_irq(void)
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
+
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
static acpi_tstate_t soc_tss_table[] = {
@@ -309,33 +318,14 @@ void generate_cpu_entries(const struct device *device)
acpigen_write_processor_cnot(pattrs->num_cpus);
}
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci_irq = acpi_sci_irq();
- acpi_madt_irqoverride_t *irqovr;
- uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- if (sci_irq >= 20)
- sci_flags |= MP_IRQ_POLARITY_LOW;
- else
- sci_flags |= MP_IRQ_POLARITY_HIGH;
-
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
-
- return current;
-}
-
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
- current = acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
return current;
}