soc/{baytrail/braswell/broadwell}: fix flashconsole on platform

Enabling flashconsole on these platforms fails to build due to
spi.c not being compiled in prior to ramstage. Include in early stages
(bootblock/romstage/postcar) as needed to enable flashconsole support.

Early inclusion of monotonic_timer.c is needed for Broadwell as well.

Change-Id: Idae0578ca92939246021bb85e34b0dcbd41df3b5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index 6b466c66f8..e479a3c5e5 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -15,10 +15,12 @@ romstage-y += lpc_init.c
 romstage-y += memmap.c
 romstage-y += pmutil.c
 romstage-y += smbus.c
+romstage-y += spi.c
 romstage-y += tsc_freq.c
 
 postcar-y += memmap.c
 postcar-y += iosf.c
+postcar-y += spi.c
 postcar-y += tsc_freq.c
 
 ramstage-y += acpi.c