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| author | Martin Roth <martinroth@google.com> | 2016-01-04 12:43:22 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-06 17:41:49 +0100 |
| commit | f812c44f003a1ba34548d1eceb622221d95a5945 (patch) | |
| tree | 74b993bf512fc2279929a41b57cc003e40a56289 /src/soc/intel/braswell/Makefile.inc | |
| parent | 331c722dd73ff5902c76092f31ce1936b64643a1 (diff) | |
intel/braswell: Build in both C0 and 'other' vbios
The Braswell CPU seems to have two different Video BIOS roms, one for
the C0 revision, and one for other revisions. Build them both into
the coreboot image, and let coreboot sort out which one should be used
at runtime. This should allow one rom to be used for all revisions.
The initial reason for this patch was that the Kconfig symbol
C0_DISP_SUPPORT didn't exist, and was causing issues. This
seems like the best way to eliminate the need for that symbol.
Change-Id: I5b9f225c0daf4e02fda75daf9cd07bb160bf0e0f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12826
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/braswell/Makefile.inc')
| -rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 54b9c6a3e6..b61323d36b 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -43,7 +43,6 @@ ramstage-y += tsc_freq.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c - smm-y += lpc_init.c smm-y += pmutil.c smm-y += smihandler.c @@ -58,4 +57,16 @@ CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/braswell CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR) -endif +ifneq ($(CONFIG_GOP_SUPPORT),y) +ifneq ($(CONFIG_VGA_BIOS_FILE),) +#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin +BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))) + +cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom +pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS) +pci8086,22b1.rom-type := optionrom + +endif # ifneq ($(CONFIG_GOP_SUPPORT),y) +endif # ifneq ($(CONFIG_VGA_BIOS_FILE),) + +endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) |