soc/intel/braswell/smbus: Enable early SMBus in romstage

Enable early SMBus support compatible with SPD library using Intel SB
common SMBus API.

TEST=boot Protectli FW2B with new FSP, MemoryInit should pass without
errors

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index a2b7ee5e67..4e90edf15c 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -14,6 +14,7 @@ romstage-y += iosf.c
 romstage-y += lpc_init.c
 romstage-y += memmap.c
 romstage-y += pmutil.c
+romstage-y += smbus.c
 romstage-y += tsc_freq.c
 
 postcar-y += tsc_freq.c