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authorMartin Roth <gaumless@gmail.com>2015-07-09 21:02:26 -0600
committerPatrick Georgi <pgeorgi@google.com>2015-09-16 14:36:01 +0000
commit3fda3c2f8d61e7b5d23534ecdcb580005dff6292 (patch)
treed821866bd942f3f1cc9432e7292c928dc63ee5c2 /src/soc/intel/braswell/Kconfig
parent9b9d4b3a474a4be3e9fd62651258152cffde6c82 (diff)
Move final Intel chipsets with ME to intel/common/firmware
This switches the final 4 Intel platforms that use ME firmware from using code specific to the platform to the common IFD Kconfig and Makefile. braswell, broadwell, bd82x6x (cougar point & panther point) and ibexpeak Change-Id: Id3bec6dbe2e1a8a90f51d9378150dbb44258b596 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10876 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/braswell/Kconfig')
-rw-r--r--src/soc/intel/braswell/Kconfig68
1 files changed, 4 insertions, 64 deletions
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index ab99a08724..043dc1a43a 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -47,6 +47,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_SYNC_MFENCE
select UDELAY_TSC
select USE_GENERIC_FSP_CAR_INC
+ select HAVE_INTEL_FIRMWARE
config BOOTBLOCK_CPU_INIT
string
@@ -116,19 +117,6 @@ config RESET_ON_INVALID_RAMSTAGE_CACHE
the system will reset otherwise the ramstage will be reloaded from
cbfs.
-config LOCK_MANAGEMENT_ENGINE
- bool "Lock Management Engine section"
- default n
- help
- The Intel Management Engine supports preventing write accesses
- from the host to the Management Engine section in the firmware
- descriptor. If the ME section is locked, it can only be overwritten
- with an external SPI flash programmer. You will want this if you
- want to increase security of your ROM image once you are sure
- that the ME firmware is no longer going to change.
-
- If unsure, say N.
-
config ENABLE_BUILTIN_COM1
bool "Enable builtin COM1 Serial Port"
default n
@@ -138,66 +126,18 @@ config ENABLE_BUILTIN_COM1
the debug console.
config HAVE_IFD_BIN
- bool
- default y
+ def_bool y
config BUILD_WITH_FAKE_IFD
- bool "Build with a fake IFD"
- default y if !HAVE_IFD_BIN
- help
- If you don't have an Intel Firmware Descriptor (ifd.bin) for your
- board, you can select this option and coreboot will build without it.
- Though, the resulting coreboot.rom will not contain all parts required
- to get coreboot running on your board. You can however write only the
- BIOS section to your board's flash ROM and keep the other sections
- untouched. Unfortunately the current version of flashrom doesn't
- support this yet. But there is a patch pending [1].
-
- WARNING: Never write a complete coreboot.rom to your flash ROM if it
- was built with a fake IFD. It just won't work.
-
- [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html
+ def_bool !HAVE_IFD_BIN
config HAVE_ME_BIN
- bool "Add Intel Management Engine firmware"
- default y
- help
- The Intel processor in the selected system requires a special firmware
- for an integrated controller called Management Engine (ME). The ME
- firmware might be provided in coreboot's 3rdparty/blobs repository. If
- not and if you don't have the firmware elsewhere, you can still
- build coreboot without it. In this case however, you'll have to make
- sure that you don't overwrite your ME firmware on your flash ROM.
+ def_bool y
config IED_REGION_SIZE
hex
default 0x400000
-config IFD_BIN_PATH
- string "Path to intel firmware descriptor"
- depends on !BUILD_WITH_FAKE_IFD
- default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
-
-config IFD_BIOS_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
-
-config IFD_ME_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
-
-config IFD_PLATFORM_SECTION
- depends on BUILD_WITH_FAKE_IFD
- string
- default ""
-
-config ME_BIN_PATH
- string "Path to management engine firmware"
- depends on HAVE_ME_BIN
- default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
-
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "soc/intel/braswell/bootblock/timestamp.inc"