diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-18 15:07:33 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-11-26 23:39:16 +0000 |
| commit | 9018dee6856791ab599463a771826936c20a80bb (patch) | |
| tree | 079e966e6b894bb9c81ca25e9e783c28947e0e64 /src/soc/intel/baytrail | |
| parent | 5aa98964fb4e2e8c10b1663f8d6a3faa2b700410 (diff) | |
src/soc/intel: Remove unnecessary space after casts
Change-Id: I098104f32dd7c66d7bb79588ef315a242c3889ba
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/baytrail')
| -rw-r--r-- | src/soc/intel/baytrail/refcode_native.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/soc/intel/baytrail/refcode_native.c b/src/soc/intel/baytrail/refcode_native.c index c915530860..bc7a87c93f 100644 --- a/src/soc/intel/baytrail/refcode_native.c +++ b/src/soc/intel/baytrail/refcode_native.c @@ -29,21 +29,21 @@ static void program_modphy_table(struct modphy_entry *table) static void gpio_sc_sdcard_workaround(void) { - setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 0)); - setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 2)); - clrbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 1)); - clrbits32((char *) IO_BASE_ADDRESS + 0x690, (1 << 3)); + setbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 0)); + setbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 2)); + clrbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 1)); + clrbits32((char *)IO_BASE_ADDRESS + 0x690, (1 << 3)); udelay(100); - clrbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 0)); + clrbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 0)); udelay(100); - write32((char *) IO_BASE_ADDRESS + 0x830, 0x78480); + write32((char *)IO_BASE_ADDRESS + 0x830, 0x78480); udelay(40); - write32((char *) IO_BASE_ADDRESS + 0x830, 0x78080); - setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 0)); + write32((char *)IO_BASE_ADDRESS + 0x830, 0x78080); + setbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 0)); udelay(100); - setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 1)); - clrbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 2)); - clrsetbits32((char *) IO_BASE_ADDRESS + 0x690, 7, (1 << 0)); + setbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 1)); + clrbits32((char *)IO_BASE_ADDRESS + 0x698, (1 << 2)); + clrsetbits32((char *)IO_BASE_ADDRESS + 0x690, 7, (1 << 0)); } #define BUNIT_BALIMIT0 0x0b @@ -99,10 +99,10 @@ void baytrail_run_reference_code(void) program_modphy_table(revb0_modphy_table); } - setbits32((char *) PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1, 8); + setbits32((char *)PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1, 8); for (pollcnt = 0; pollcnt < 10; ++pollcnt) { - tmp = read32((char *) PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1); + tmp = read32((char *)PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1); printk(BIOS_DEBUG, "Polling bit3 of R_PCH_PMC_MTPMC1 = %x\n", tmp); if (!(tmp & 8)) break; |