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author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2023-04-20 17:26:00 +0530 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-26 18:04:30 +0000 |
commit | 83b36f82761f3d354266300bd4dcfd517ac29b1b (patch) | |
tree | 8622f53378980eeefa1a6b8bfcb40762e334be8a /src/soc/intel/baytrail | |
parent | e9efd3248550e01a5043860f25239a799d5b19bc (diff) |
soc/intel/common: Support power limits update for variants
Add support to update power limit values for variants.
Until now, each SoC implements this themselves.
To avoid code duplication, add this to common code.
BRANCH=None
BUG=b:270664854
TEST=Built and verified power limit values as below log message
for 15W SKU on Rex board.
Overriding power limits PL1 (mW) (10000, 15000) PL2 (mW)
(57000, 57000) PL4 (W) (114)
Change-Id: I414715f211d816bbfad03a673ca96dd5df94caeb
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/baytrail')
0 files changed, 0 insertions, 0 deletions