diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2013-08-01 13:31:44 -0700 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-05 22:21:49 +0100 |
| commit | 3a6550d989460f9449136814a8b1f6b051a6382d (patch) | |
| tree | d60bdfd55ddcc5e45042c987d5216d9212784f60 /src/soc/intel/baytrail | |
| parent | 83405a1241f4b8f516f687bd00f8ea981f7c7d87 (diff) | |
timestamps: Switch from tsc_t to uint64_t
Cherry-pick from chromium and adjusted for added boards
and changed directory layout for arch/arm.
Timestamp implementation for ARMv7
Abstract the use of rdtsc() and make the timestamps
uint64_t in the generic code.
The ARM implementation uses the monotonic timer.
Original-Signed-off-by: Stefan Reinauer <reinauer@google.com>
BRANCH=none
BUG=chrome-os-partner:18637
TEST=See cbmem print timestamps
Original-Change-Id: Id377ba570094c44e6895ae75f8d6578c8865ea62
Original-Reviewed-on: https://gerrit.chromium.org/gerrit/63793
(cherry-picked from commit cc1a75e059020a39146e25b9198b0d58aa03924c)
Change-Id: Ic51fb78ddd05ba81906d9c3b35043fa14fbbed75
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8020
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/soc/intel/baytrail')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 22 |
1 files changed, 4 insertions, 18 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index b69b532e31..ac5afabffd 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -44,20 +44,6 @@ #include <baytrail/smm.h> #include <baytrail/spi.h> -static inline uint64_t timestamp_get(void) -{ - return rdtscll(); -} - -static inline tsc_t ts64_to_tsc(uint64_t ts) -{ - tsc_t tsc = { - .lo = ts, - .hi = ts >> 32, - }; - return tsc; -} - /* The cache-as-ram assembly file calls romstage_main() after setting up * cache-as-ram. romstage_main() will then call the mainboards's * mainboard_romstage_entry() function. That function then calls @@ -274,10 +260,10 @@ void romstage_common(struct romstage_params *params) chromeos_init(prev_sleep_state); /* Save timestamp information. */ - timestamp_init(ts64_to_tsc(params->ts.times[0])); - timestamp_add(TS_START_ROMSTAGE, ts64_to_tsc(params->ts.times[1])); - timestamp_add(TS_BEFORE_INITRAM, ts64_to_tsc(params->ts.times[2])); - timestamp_add(TS_AFTER_INITRAM, ts64_to_tsc(params->ts.times[3])); + timestamp_init(params->ts.times[0]); + timestamp_add(TS_START_ROMSTAGE, params->ts.times[1]); + timestamp_add(TS_BEFORE_INITRAM, params->ts.times[2]); + timestamp_add(TS_AFTER_INITRAM, params->ts.times[3]); } void asmlinkage romstage_after_car(void) |