diff options
| author | Christian Walter <christian.walter@9elements.com> | 2019-12-18 15:07:59 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-03-23 16:54:58 +0000 |
| commit | be3979c873d23cb0543e635bba59bd85ab67fed0 (patch) | |
| tree | c8a1064696607573eebd0b03c411a8aa090f015c /src/soc/intel/baytrail | |
| parent | 09eb8d0c9b3b9e7b765520114d148a19926ff886 (diff) | |
acpi: Change Processor ACPI Name (Intel only)
The ACPI Spec 2.0 states, that Processor declarations should be made
within the ACPI namespace \_SB and not \_PR anymore. \_PR is deprecated
and is removed here for Intel CPUs only.
Tested on:
* X11SSH (Kabylake)
* CFL Platform
* Asus P8Z77-V LX2 and Windows 10
FWTS does not return FAIL anymore on ACPI tests
Tested-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: Ib101ed718f90f9056d2ecbc31b13b749ed1fc438
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37814
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/baytrail')
| -rw-r--r-- | src/soc/intel/baytrail/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/acpi/dptf/cpu.asl | 38 |
2 files changed, 20 insertions, 20 deletions
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index c9ccdbdbf6..1797e48543 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -419,7 +419,7 @@ void generate_cpu_entries(struct device *device) plen = 0; } - /* Generate processor \_PR.CPUx */ + /* Generate processor \_SB.CPUx */ acpigen_write_processor( core, pcontrol_blk, plen); diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl index a351e6c136..289dcd4a7b 100644 --- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl +++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl @@ -12,11 +12,11 @@ * GNU General Public License for more details. */ -External (\_PR.CP00._TSS, MethodObj) -External (\_PR.CP00._TPC, MethodObj) -External (\_PR.CP00._PTC, PkgObj) -External (\_PR.CP00._TSD, PkgObj) -External (\_PR.CP00._PSS, MethodObj) +External (\_SB.CP00._TSS, MethodObj) +External (\_SB.CP00._TPC, MethodObj) +External (\_SB.CP00._PTC, PkgObj) +External (\_SB.CP00._TSD, PkgObj) +External (\_SB.CP00._PSS, MethodObj) Device (TCPU) { @@ -38,8 +38,8 @@ Device (TCPU) Method (_TSS) { - If (CondRefOf (\_PR.CP00._TSS)) { - Return (\_PR.CP00._TSS) + If (CondRefOf (\_SB.CP00._TSS)) { + Return (\_SB.CP00._TSS) } Else { Return (Package () { @@ -50,8 +50,8 @@ Device (TCPU) Method (_TPC) { - If (CondRefOf (\_PR.CP00._TPC)) { - Return (\_PR.CP00._TPC) + If (CondRefOf (\_SB.CP00._TPC)) { + Return (\_SB.CP00._TPC) } Else { Return (0) } @@ -59,8 +59,8 @@ Device (TCPU) Method (_PTC) { - If (CondRefOf (\_PR.CP00._PTC)) { - Return (\_PR.CP00._PTC) + If (CondRefOf (\_SB.CP00._PTC)) { + Return (\_SB.CP00._PTC) } Else { Return (Package () { @@ -72,8 +72,8 @@ Device (TCPU) Method (_TSD) { - If (CondRefOf (\_PR.CP00._TSD)) { - Return (\_PR.CP00._TSD) + If (CondRefOf (\_SB.CP00._TSD)) { + Return (\_SB.CP00._TSD) } Else { Return (Package () { @@ -84,8 +84,8 @@ Device (TCPU) Method (_TDL) { - If (CondRefOf (\_PR.CP00._TSS)) { - Store (SizeOf (\_PR.CP00._TSS ()), Local0) + If (CondRefOf (\_SB.CP00._TSS)) { + Store (SizeOf (\_SB.CP00._TSS ()), Local0) Decrement (Local0) Return (Local0) } Else { @@ -112,8 +112,8 @@ Device (TCPU) Method (_PSS) { - If (CondRefOf (\_PR.CP00._PSS)) { - Return (\_PR.CP00._PSS) + If (CondRefOf (\_SB.CP00._PSS)) { + Return (\_SB.CP00._PSS) } Else { Return (Package () { @@ -127,8 +127,8 @@ Device (TCPU) /* Check for mainboard specific _PDL override */ If (CondRefOf (\_SB.MPDL)) { Return (\_SB.MPDL) - } ElseIf (CondRefOf (\_PR.CP00._PSS)) { - Store (SizeOf (\_PR.CP00._PSS ()), Local0) + } ElseIf (CondRefOf (\_SB.CP00._PSS)) { + Store (SizeOf (\_SB.CP00._PSS ()), Local0) Decrement (Local0) Return (Local0) } Else { |