diff options
author | Martin Roth <martin@coreboot.org> | 2019-10-23 21:45:23 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-10-27 21:08:58 +0000 |
commit | 57e89090818537d6dd9bd478a3aa6b5ec2ea8704 (patch) | |
tree | a218f5dba2bbd93ccc5fc3dc754499244e5378b7 /src/soc/intel/baytrail | |
parent | ad0f4853619b1c239b8ace7554958c6b4932c04f (diff) |
src/soc: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9c1228d3f9e7a12fe30c48e3b1f143520fed875c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/baytrail')
-rw-r--r-- | src/soc/intel/baytrail/include/soc/msr.h | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/include/soc/pattrs.h | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/lpe.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/southcluster.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/spi.c | 18 | ||||
-rw-r--r-- | src/soc/intel/baytrail/tsc_freq.c | 4 |
6 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/intel/baytrail/include/soc/msr.h b/src/soc/intel/baytrail/include/soc/msr.h index 5038bf87db..825e7f2372 100644 --- a/src/soc/intel/baytrail/include/soc/msr.h +++ b/src/soc/intel/baytrail/include/soc/msr.h @@ -39,7 +39,7 @@ #define MSR_CPU_THERM_SENS_CFG 0x675 /* Read BCLK from MSR */ -unsigned bus_freq_khz(void); +unsigned int bus_freq_khz(void); void set_max_freq(void); #endif /* _BAYTRAIL_MSR_H_ */ diff --git a/src/soc/intel/baytrail/include/soc/pattrs.h b/src/soc/intel/baytrail/include/soc/pattrs.h index 7d10cea2cb..7b46345a47 100644 --- a/src/soc/intel/baytrail/include/soc/pattrs.h +++ b/src/soc/intel/baytrail/include/soc/pattrs.h @@ -42,7 +42,7 @@ struct pattrs { const void *microcode_patch; int address_bits; int num_cpus; - unsigned bclk_khz; + unsigned int bclk_khz; }; /* This is just to hide the abstraction w/o relying on how the underlying diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c index 9636640108..3fa5459cea 100644 --- a/src/soc/intel/baytrail/lpe.c +++ b/src/soc/intel/baytrail/lpe.c @@ -42,7 +42,7 @@ #define FIRMWARE_REG_BASE_C0 0x144000 #define FIRMWARE_REG_LENGTH_C0 (FIRMWARE_REG_BASE_C0 + 4) -static void assign_device_nvs(struct device *dev, u32 *field, unsigned index) +static void assign_device_nvs(struct device *dev, u32 *field, unsigned int index) { struct resource *res; diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 3c0c07fc8e..fb6143efb0 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -351,7 +351,7 @@ static void hda_work_around(struct device *dev) static int place_device_in_d3hot(struct device *dev) { - unsigned offset; + unsigned int offset; /* Parts of the HDA block are used for LPE audio as well. * Therefore assume the HDA will never be put into D3Hot. */ diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index 26b717c65e..e43900258e 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -76,7 +76,7 @@ typedef struct ich_spi_controller { uint16_t *optype; uint32_t *addr; uint8_t *data; - unsigned databytes; + unsigned int databytes; uint8_t *status; uint16_t *control; uint32_t *bbar; @@ -140,7 +140,7 @@ static u8 readb_(const void *addr) { u8 v = read8((unsigned long)addr); printk(BIOS_DEBUG, "read %2.2x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -148,7 +148,7 @@ static u16 readw_(const void *addr) { u16 v = read16((unsigned long)addr); printk(BIOS_DEBUG, "read %4.4x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -156,7 +156,7 @@ static u32 readl_(const void *addr) { u32 v = read32((unsigned long)addr); printk(BIOS_DEBUG, "read %8.8x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -164,21 +164,21 @@ static void writeb_(u8 b, void *addr) { write8(addr, b); printk(BIOS_DEBUG, "wrote %2.2x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } static void writew_(u16 b, void *addr) { write16(addr, b); printk(BIOS_DEBUG, "wrote %4.4x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } static void writel_(u32 b, void *addr) { write32(addr, b); printk(BIOS_DEBUG, "wrote %8.8x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } #else /* CONFIG_DEBUG_SPI_FLASH ^^^ enabled vvv NOT enabled */ @@ -285,13 +285,13 @@ typedef struct spi_transaction { uint32_t offset; } spi_transaction; -static inline void spi_use_out(spi_transaction *trans, unsigned bytes) +static inline void spi_use_out(spi_transaction *trans, unsigned int bytes) { trans->out += bytes; trans->bytesout -= bytes; } -static inline void spi_use_in(spi_transaction *trans, unsigned bytes) +static inline void spi_use_in(spi_transaction *trans, unsigned int bytes) { trans->in += bytes; trans->bytesin -= bytes; diff --git a/src/soc/intel/baytrail/tsc_freq.c b/src/soc/intel/baytrail/tsc_freq.c index 5b2d13599d..edc31c1e47 100644 --- a/src/soc/intel/baytrail/tsc_freq.c +++ b/src/soc/intel/baytrail/tsc_freq.c @@ -18,7 +18,7 @@ #include <cpu/x86/tsc.h> #include <soc/msr.h> -unsigned bus_freq_khz(void) +unsigned int bus_freq_khz(void) { msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL); switch (clk_info.lo & 0x3) { @@ -38,7 +38,7 @@ unsigned bus_freq_khz(void) unsigned long tsc_freq_mhz(void) { msr_t platform_info; - unsigned bclk_khz = bus_freq_khz(); + unsigned int bclk_khz = bus_freq_khz(); if (!bclk_khz) return 0; |