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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-03 08:01:05 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 15:57:39 +0000
commit13f66507afdcde5170546e5ca1ce5a945895eb10 (patch)
tree40c1d05a05b05b596f290c186aa59a8b4d9768ab /src/soc/intel/baytrail
parent065857ee7fd61b05025d7a803e82f2b9b53cbc9a (diff)
device/mmio.h: Add include file for MMIO ops
MMIO operations are arch-agnostic so the include path should not be arch/. Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31691 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail')
-rw-r--r--src/soc/intel/baytrail/acpi.c2
-rw-r--r--src/soc/intel/baytrail/gfx.c2
-rw-r--r--src/soc/intel/baytrail/gpio.c2
-rw-r--r--src/soc/intel/baytrail/include/soc/gpio.h2
-rw-r--r--src/soc/intel/baytrail/iosf.c2
-rw-r--r--src/soc/intel/baytrail/lpe.c2
-rw-r--r--src/soc/intel/baytrail/pmutil.c1
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c1
-rw-r--r--src/soc/intel/baytrail/sata.c2
-rw-r--r--src/soc/intel/baytrail/smm.c1
-rw-r--r--src/soc/intel/baytrail/southcluster.c1
-rw-r--r--src/soc/intel/baytrail/spi.c2
12 files changed, 13 insertions, 7 deletions
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index b2cac4cd1e..666a9daaf3 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -16,7 +16,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index 5a36de57f3..73c0d152d8 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c
index 743ab9fbef..8d9ce0075e 100644
--- a/src/soc/intel/baytrail/gpio.c
+++ b/src/soc/intel/baytrail/gpio.c
@@ -13,6 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci.h>
#include <console/console.h>
#include <soc/gpio.h>
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index 474aaea314..2fed005c90 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -17,7 +17,7 @@
#define _BAYTRAIL_GPIO_H_
#include <stdint.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <soc/iomap.h>
/* #define GPIO_DEBUG */
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c
index 5496b011a3..9e308bcc1e 100644
--- a/src/soc/intel/baytrail/iosf.c
+++ b/src/soc/intel/baytrail/iosf.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <soc/iosf.h>
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index caa37103bb..1843f08073 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c
index 5ef1f714bd..b740a03818 100644
--- a/src/soc/intel/baytrail/pmutil.c
+++ b/src/soc/intel/baytrail/pmutil.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 3e0ba32a45..7ea1443ed6 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -16,6 +16,7 @@
#include <stddef.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <bootblock_common.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/sata.c b/src/soc/intel/baytrail/sata.c
index adf0f96f84..e7636fe4f4 100644
--- a/src/soc/intel/baytrail/sata.c
+++ b/src/soc/intel/baytrail/sata.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c
index a65e10e55f..ec0aa8585b 100644
--- a/src/soc/intel/baytrail/smm.c
+++ b/src/soc/intel/baytrail/smm.c
@@ -18,6 +18,7 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 89b6b31ebf..7b01cfa8e1 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <arch/cpu.h>
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index 7cbb082116..9dd89d2a8d 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -18,7 +18,7 @@
#include <string.h>
#include <bootstate.h>
#include <delay.h>
-#include <arch/io.h>
+#include <device/mmio.h>
#include <device/pci_ops.h>
#include <commonlib/helpers.h>
#include <console/console.h>