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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-10 19:22:31 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-16 09:38:29 +0000
commit11c6b8b53182c5c83095136712f3d38eb5c1dd6a (patch)
tree71bf26998c487dd0528cd7f720e2b385be93e211 /src/soc/intel/baytrail
parentb8b41338aae9acfa2a49c64d8e57a95653aef610 (diff)
nb,soc/intel: Switch to CHROMEOS_RAMOOPS_DYNAMIC
Change-Id: I4ec59cea256a39a94b05cdeb8f914830ac0bd3f7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail')
-rw-r--r--src/soc/intel/baytrail/Kconfig3
-rw-r--r--src/soc/intel/baytrail/northcluster.c4
2 files changed, 3 insertions, 4 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 8811b38cf9..f539be88fe 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -37,6 +37,9 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_COMMON
select CPU_HAS_L2_ENABLE_MSR
+config CHROMEOS
+ select CHROMEOS_RAMOOPS_DYNAMIC
+
config VBOOT
select VBOOT_MUST_REQUEST_DISPLAY
select VBOOT_STARTS_IN_ROMSTAGE
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index f4cbc940d6..e8f97681a4 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -10,7 +10,6 @@
#include <soc/iosf.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
-#include <vendorcode/google/chromeos/chromeos.h>
/*
* Host Memory Map:
@@ -119,9 +118,6 @@ static void nc_read_resources(struct device *dev)
*/
mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10);
-
- if (CONFIG(CHROMEOS_RAMOOPS))
- chromeos_reserve_ram_oops(dev, index++);
}
static void nc_generate_ssdt(const struct device *dev)