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authorAaron Durbin <adurbin@chromium.org>2016-08-11 17:09:57 -0500
committerMartin Roth <martinroth@google.com>2016-08-19 03:09:01 +0200
commit1ad9f946b6886f08c2cae8503d7efc3f569c1a93 (patch)
treeb82eeb41195ecdd0e94d4399ca069353f046bee3 /src/soc/intel/baytrail
parent504b8f2da211735e60b861106bf665a62091c36d (diff)
soc/intel/apollolake: make SPI support early stages
Using malloc() in SPI code is unnecessary as there's only one SPI device that the SoC support code handles: boot device. Therefore, use CAR to for the storage to work around the current limiations of the SPI API which expects one to return pointers to objects that are writable. BUG=chrome-os-partner:56151 Change-Id: If4f5484e27d68b2dd1b17a281cf0b760086850a7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16195 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/baytrail')
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