diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-17 06:47:50 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-21 07:01:23 +0000 |
| commit | 8e23bac97ec66a49f9ddb1a4069e4e68666833fb (patch) | |
| tree | 92d982a32199bc827e59dc7d8da48a96e5d98599 /src/soc/intel/baytrail/tsc_freq.c | |
| parent | 12b121cdb450d96309dd96b2ccc25fc5501d2250 (diff) | |
intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor
Remove cases of __PRE_RAM__ and other preprocessor guards.
Change-Id: Id295227df344fb209d7d5fd12e82aa450198bbb8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34928
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/tsc_freq.c')
| -rw-r--r-- | src/soc/intel/baytrail/tsc_freq.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/baytrail/tsc_freq.c b/src/soc/intel/baytrail/tsc_freq.c index f9c3014273..5b2d13599d 100644 --- a/src/soc/intel/baytrail/tsc_freq.c +++ b/src/soc/intel/baytrail/tsc_freq.c @@ -47,13 +47,6 @@ unsigned long tsc_freq_mhz(void) return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000; } -#if !defined(__SMM__) -#if !defined(__PRE_RAM__) -#include <soc/ramstage.h> -#else -#include <soc/romstage.h> -#endif - void set_max_freq(void) { msr_t perf_ctl; @@ -76,5 +69,3 @@ void set_max_freq(void) wrmsr(IA32_PERF_CTL, perf_ctl); } - -#endif /* __SMM__ */ |