diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 14:24:03 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:07 +0000 |
| commit | 64b4bddcbc2156e9a410f07e14e58cf01d579fdb (patch) | |
| tree | a9b5157046c8102a876166739b0ea00d9b8677d9 /src/soc/intel/baytrail/southcluster.c | |
| parent | d1fc8c13437da7326aaf189f1acc4fae4f6715b0 (diff) | |
soc/intel/baytrail: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.
BUG=b:63054105
Change-Id: I1d90cc557225ddbba1787bf95eae0de623af487e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/southcluster.c')
| -rw-r--r-- | src/soc/intel/baytrail/southcluster.c | 18 |
1 files changed, 1 insertions, 17 deletions
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 090b98802b..d16c4ff148 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -125,23 +125,7 @@ static void sc_read_resources(device_t dev) static void sc_rtc_init(void) { - uint32_t gen_pmcon1; - int rtc_fail; - struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); - - if (ps != NULL) { - gen_pmcon1 = ps->gen_pmcon1; - } else { - gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1)); - } - - rtc_fail = !!(gen_pmcon1 & RPS); - - if (rtc_fail) { - printk(BIOS_DEBUG, "RTC failure.\n"); - } - - cmos_init(rtc_fail); + cmos_init(rtc_failure()); } /* |