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author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-09 17:37:20 +0100 |
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committer | Paul Fagerburg <pfagerburg@chromium.org> | 2023-03-13 14:01:52 +0000 |
commit | a83a4cb90cf5201a6b9635eaa171060549b25583 (patch) | |
tree | 7f02bc9c73e150e3ff198ba990ae3f0ca9989d88 /src/soc/intel/baytrail/scc.c | |
parent | 9b9d267f5a31b66c3d7f6514b01885ddb6b42436 (diff) |
soc/amd/common/block/cpu/noncar/write_resume_eip: use raw MSR data
Since mst_t is a union of the struct containing the lower and higher 32
bits and the raw 64 bit value, the address of the bootblock_resume_entry
can be directly written to the raw value instead of needing to split it
into the lower and higher 32 bits and assigning those separately.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I7ebab1784ec592e18c29001b1cf3ee7790615bf8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/baytrail/scc.c')
0 files changed, 0 insertions, 0 deletions