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author | Raul E Rangel <rrangel@chromium.org> | 2021-02-11 16:43:53 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-22 07:29:01 +0000 |
commit | 980721b3ed253e699c4a208040c76045abb3d964 (patch) | |
tree | 2185636444cde4845c453337b8cb8565ec71f214 /src/soc/intel/baytrail/scc.c | |
parent | 1156acbb7eaae3f23e67e05512068e183eea6375 (diff) |
soc/amd/cezanne/acpi: Add MMIO devices
The devices were copied from picasso with the following modifications:
* UART{2,3} were deleted
* I2C{0,1} were added
* eMMC was removed since it hasn't been validated
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Iddfb975e9292785d0951dd7bb31c1997d2185abd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/scc.c')
0 files changed, 0 insertions, 0 deletions