diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2022-01-27 07:55:34 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-28 15:10:46 +0000 |
| commit | 0bc5d9dfff8ecd380fa914a6e0885aef04467f8d (patch) | |
| tree | fa1fc19c9f19b8e315b8d8e8fd152bd541c5a62d /src/soc/intel/baytrail/sata.c | |
| parent | f711bf03a694bc594a610a70251716d425fbe101 (diff) | |
src/{drivers,soc}: Fix some code indents
Change-Id: I55682de4a1bc74f170e2044de35b0d8d53ef51ff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/soc/intel/baytrail/sata.c')
| -rw-r--r-- | src/soc/intel/baytrail/sata.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/sata.c b/src/soc/intel/baytrail/sata.c index 24c805ac81..5e5215b249 100644 --- a/src/soc/intel/baytrail/sata.c +++ b/src/soc/intel/baytrail/sata.c @@ -71,7 +71,7 @@ static void sata_init(struct device *dev) pci_write_config16(dev, 0x92, reg16); if (config->sata_ahci) { - u8 *abar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5); + u8 *abar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5); /* Enable CR memory space decoding */ reg16 = pci_read_config16(dev, 0x04); |