diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2019-08-22 12:41:12 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-27 07:21:00 +0000 |
| commit | da10b9224aaa0c41571b5c0c7017b75d4343ebe4 (patch) | |
| tree | 5a4fabc348f14f2424da214cf0e747d36ac7bb04 /src/soc/intel/baytrail/sata.c | |
| parent | 1458777c3ba714b9f62799f8cf4bbbf2e82b9d75 (diff) | |
libpayload/usb: add USB 3.1 GEN2 support
USB 3.1 GEN2 report speed type 4, add into speed enum.
BUG=b:139787920
BRANCH=N/A
TEST=Build libpayload and depthcharge on sarien and boot with
USB GEN2 HUB with USB disk. Check ultra speed device in cbmem log.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ia0ef12b2f0d91bf0d0db766bbc9019de1614a4f4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35023
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/sata.c')
0 files changed, 0 insertions, 0 deletions