diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-13 23:20:07 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:31:56 +0200 |
| commit | f5cfaa39342bed7dbf3abe19486089c4cf8a4561 (patch) | |
| tree | 9eda5fa75385b45dd5f618a024b22ef48da4e63f /src/soc/intel/baytrail/romstage/romstage.c | |
| parent | 56db47fe204482093b23034030f7a7060c5c977b (diff) | |
soc/intel/baytrail: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions
generic ACPI definitions.
BUG=chrome-os-partner:54977
Change-Id: Idf055fa86b56001a805e139de6723dfb77dcb224
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15669
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/romstage/romstage.c')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index d7e8b17648..96ae86dd63 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -184,17 +184,16 @@ static struct chipset_power_state *fill_power_state(void) static int chipset_prev_sleep_state(struct chipset_power_state *ps) { /* Default to S0. */ - int prev_sleep_state = 0; + int prev_sleep_state = ACPI_S0; if (ps->pm1_sts & WAK_STS) { - switch ((ps->pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { - #if CONFIG_HAVE_ACPI_RESUME - case SLP_TYP_S3: - prev_sleep_state = 3; + switch (acpi_sleep_from_pm1(ps->pm1_cnt)) { + case ACPI_S3: + if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) + prev_sleep_state = ACPI_S3; break; - #endif - case SLP_TYP_S5: - prev_sleep_state = 5; + case ACPI_S5: + prev_sleep_state = ACPI_S5; break; } /* Clear SLP_TYP. */ @@ -202,7 +201,7 @@ static int chipset_prev_sleep_state(struct chipset_power_state *ps) } if (ps->gen_pmcon1 & (PWR_FLR | SUS_PWR_FLR)) { - prev_sleep_state = 5; + prev_sleep_state = ACPI_S5; } return prev_sleep_state; @@ -223,7 +222,7 @@ void romstage_common(struct romstage_params *params) printk(BIOS_DEBUG, "prev_sleep_state = S%d\n", prev_sleep_state); #if CONFIG_ELOG_BOOT_COUNT - if (prev_sleep_state != 3) + if (prev_sleep_state != ACPI_S3) boot_count_increment(); #endif @@ -235,12 +234,12 @@ void romstage_common(struct romstage_params *params) handoff = romstage_handoff_find_or_add(); if (handoff != NULL) - handoff->s3_resume = (prev_sleep_state == 3); + handoff->s3_resume = (prev_sleep_state == ACPI_S3); else printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); if (IS_ENABLED(CONFIG_LPC_TPM)) { - init_tpm(prev_sleep_state == 3); + init_tpm(prev_sleep_state == ACPI_S3); } } |