diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-10-04 11:15:48 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-02-05 05:24:13 +0100 |
| commit | c0270aa6d0e183ceb04566b6e9e3939bd9215d35 (patch) | |
| tree | d81de8427f9153e1c2744c8cd09f6be115c59e5e /src/soc/intel/baytrail/romstage/romstage.c | |
| parent | fd039f7f4d84b1c04dba81874068f8ea94620f87 (diff) | |
baytrail: load microcode in bootblock
Start loading microcode in the bootblock. This way
no caching has been set up and cache-as-ram mode
will be running in a validated configruation (with ucode
patch).
BUG=chrome-os-partner:22858
BRANCH=None
TEST=Built and booted. Confirmed microcode is loaded.
Change-Id: I6fd1d8e55bcc9d799b11d9faed771ac50dc120a2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171861
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4863
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/romstage/romstage.c')
0 files changed, 0 insertions, 0 deletions