diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-17 06:47:50 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-21 07:01:23 +0000 |
| commit | 8e23bac97ec66a49f9ddb1a4069e4e68666833fb (patch) | |
| tree | 92d982a32199bc827e59dc7d8da48a96e5d98599 /src/soc/intel/baytrail/romstage/romstage.c | |
| parent | 12b121cdb450d96309dd96b2ccc25fc5501d2250 (diff) | |
intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor
Remove cases of __PRE_RAM__ and other preprocessor guards.
Change-Id: Id295227df344fb209d7d5fd12e82aa450198bbb8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34928
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/romstage/romstage.c')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index cf6a856b7b..7a413d9c1d 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -36,6 +36,7 @@ #include <soc/gpio.h> #include <soc/iomap.h> #include <soc/lpc.h> +#include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/pmc.h> #include <soc/romstage.h> @@ -131,7 +132,8 @@ static void romstage_main(uint64_t tsc) tco_disable(); - byt_config_com1_and_enable(); + if (CONFIG(ENABLE_BUILTIN_COM1)) + byt_config_com1_and_enable(); console_init(); |