cpu/intel: Enter romstage without BIST

When entry to romstage is via cpu/intel/car/romstage.c
BIST has not been passed down the path for sometime.

Change-Id: I345975c53014902269cee21fc393331d33a84dce
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 2 insertions, 3 deletions

diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 6bf8aac9af..cf6a856b7b 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -115,10 +115,9 @@ static void spi_init(void)
 }
 
 /* Entry from cache-as-ram.inc. */
-static void romstage_main(uint64_t tsc, uint32_t bist)
+static void romstage_main(uint64_t tsc)
 {
 	struct romstage_params rp = {
-		.bist = bist,
 		.mrc_params = NULL,
 	};
 
@@ -159,7 +158,7 @@ static void romstage_main(uint64_t tsc, uint32_t bist)
  */
 asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
 {
-	romstage_main(base_timestamp, bist);
+	romstage_main(base_timestamp);
 }
 
 static struct chipset_power_state power_state;