diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-12-28 16:54:54 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-08 15:33:47 +0000 |
| commit | c641f7ed9f9083f73ddb69676a74d7e205351baa (patch) | |
| tree | 7a81b9621e6c667b0c0a5de268cb7ce08e6c972d /src/soc/intel/baytrail/romstage/cache_as_ram.inc | |
| parent | ee2e936f4059d8aad4161d44915a05271df1aaae (diff) | |
cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK
Pass timestamps and BIST to romstage using the same signature
as C_ENVIRONMENT_BOOTBLOCK will.
Change-Id: Ic90da6b1b5ac3b56c69b593ba447ed8e05c8a4e2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/romstage/cache_as_ram.inc')
| -rw-r--r-- | src/soc/intel/baytrail/romstage/cache_as_ram.inc | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/src/soc/intel/baytrail/romstage/cache_as_ram.inc b/src/soc/intel/baytrail/romstage/cache_as_ram.inc index 8602237d28..4326636bfd 100644 --- a/src/soc/intel/baytrail/romstage/cache_as_ram.inc +++ b/src/soc/intel/baytrail/romstage/cache_as_ram.inc @@ -176,23 +176,24 @@ addrsize_set_high: post_code(0x29) /* Setup the stack. */ - movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax - movl %eax, %esp + mov $_car_stack_end, %esp - /* Push the initial TSC value from boot block. The low 32 bits are - * in mm1, and the high 32 bits are in mm2. */ + /* Need to align stack to 16 bytes at call instruction. Account for + the pushes below. */ + andl $0xfffffff0, %esp + subl $4, %esp + + /* push TSC and BIST to stack */ + movd %mm0, %eax + pushl %eax /* BIST */ movd %mm2, %eax - pushl %eax + pushl %eax /* tsc[63:32] */ movd %mm1, %eax - pushl %eax - /* Restore the BIST result. */ - movd %mm0, %eax - pushl %eax + pushl %eax /* tsc[31:0] */ -before_romstage: +before_c_entry: post_code(0x2a) - /* Call romstage.c main function. */ - call romstage_main + call bootblock_c_entry_bist /* Should never see this postcode */ post_code(POST_DEAD_CODE) |