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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-12 21:17:56 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-20 10:18:46 +0000 |
| commit | 3d802535cbf222d403e0d7d5cc6632546333a4c4 (patch) | |
| tree | d81070cb4e983a44e790481e22d1746b699d0a22 /src/soc/intel/baytrail/refcode.c | |
| parent | 6e425e1275a7638eb4b42b4fdec23f5674d086f5 (diff) | |
soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDF
Don't rely on the FSP-S setting the HPET and IOAPIC BDF. This makes
coreboot in control of these settings.
Change-Id: I937ebf05533019cb1a2be771ef3b9193a458dddf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc/intel/baytrail/refcode.c')
0 files changed, 0 insertions, 0 deletions