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authorAaron Durbin <adurbin@chromium.org>2016-04-11 15:01:58 -0500
committerAaron Durbin <adurbin@chromium.org>2016-04-13 16:07:51 +0200
commit108cd0e16d072bef918a3edac2a0e2703f47daba (patch)
treeff2729a19d158278dd4a96c8986ba07a191debe6 /src/soc/intel/baytrail/refcode.c
parentff7670915c55cfddff144e3f2d78425e0042b52a (diff)
soc/intel/apollolake: logically group PMC BAR programming
The ACPI base address was being programmed sepearately from the other BARs in the PMC device. Group all the programming together so there isn't separate paths for programming the relevant BARs. Change-Id: Ib17684397fc19c42b39d066f981c01a886d65235 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14320 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'src/soc/intel/baytrail/refcode.c')
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