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| author | Aaron Durbin <adurbin@chromium.org> | 2014-02-25 11:00:37 -0600 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-09-24 17:42:13 +0200 |
| commit | cd0f2283e8cd1dc43c17cb12a5e5b934f69dd657 (patch) | |
| tree | 6265fa1c623b9b7c95c475d973b2edb48aac7d03 /src/soc/intel/baytrail/pcie.c | |
| parent | 5c8d3d22c82c5f67d1c8ae1c9479b1baee49ceb2 (diff) | |
baytrail: add 80c microcode for C0 parts
Incoprorate 80c microcode version for C0 stepping parts.
Change-Id: I2a76b4c92cac0aca5949313060f1d315ebd8e1a9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187842
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 318027a8853060e7223524dbd2ad7c3b6cc9b766)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6950
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/pcie.c')
0 files changed, 0 insertions, 0 deletions