baytrail: add initial support

The initial Bay Trail code is intended to support
the mobile and desktop version of Bay Trail. This support
can train memory and execute through ramstage. However,
the resource allocation is not curently handled correctly.
The MRC cache parameters are successfully saved and reused
after the initial cold boot.

BUG=chrome-os-partner:22292
BRANCH=None
TEST=Built and booted on a reference board through ramstage.

Change-Id: I238ede326802aad272c6cca39d7ad4f161d813f5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/168387
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4847
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

1 files changed, 83 insertions, 0 deletions

diff --git a/src/soc/intel/baytrail/nvm.c b/src/soc/intel/baytrail/nvm.c
new file mode 100644
index 0000000000..dccc8014dc
--- /dev/null
+++ b/src/soc/intel/baytrail/nvm.c
@@ -0,0 +1,83 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdint.h>
+#include <stddef.h>
+#include <console/console.h>
+#include <string.h>
+#include <spi-generic.h>
+#include <spi_flash.h>
+#include <baytrail/nvm.h>
+
+/* This module assumes the flash is memory mapped just below 4GiB in the
+ * address space for reading. Also this module assumes an area it erased
+ * when all bytes read as all 0xff's. */
+
+static struct spi_flash *flash;
+
+static int nvm_init(void)
+{
+	if (flash != NULL)
+		return 0;
+
+	spi_init();
+	flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+	if (!flash) {
+		printk(BIOS_DEBUG, "Could not find SPI device\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+/* Convert memory mapped pointer to flash offset. */
+static inline uint32_t to_flash_offset(void *p)
+{
+	return CONFIG_ROM_SIZE + (uintptr_t)p;
+}
+
+int nvm_is_erased(const void *start, size_t size)
+{
+	const char *cur = start;
+
+	while (size > 0) {
+		if (*cur != 0xff)
+			return 0;
+		cur++;
+		size--;
+	}
+	return 1;
+}
+
+int nvm_erase(void *start, size_t size)
+{
+	if (nvm_init() < 0)
+		return -1;
+	flash->erase(flash, to_flash_offset(start), size);
+	return 0;
+}
+
+/* Write data to NVM. Returns 0 on success < 0 on error.  */
+int nvm_write(void *start, const void *data, size_t size)
+{
+	if (nvm_init() < 0)
+		return -1;
+	flash->write(flash, to_flash_offset(start), size, data);
+	return 0;
+}