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| author | Daniel Peng <Daniel_Peng@pegatron.corp-partner.google.com> | 2024-10-30 16:55:05 +0800 |
|---|---|---|
| committer | Eric Lai <ericllai@google.com> | 2024-11-06 07:51:33 +0000 |
| commit | 55e7baff922830d0d5fbcda61345e612f3e6750f (patch) | |
| tree | f1083da2dba7762d7f10132b09c01c78b5204a34 /src/soc/intel/baytrail/lpss.c | |
| parent | 01dfc9b18730189445353422a5569e9d9865f5e3 (diff) | |
mb/google/nissa/var/glassway: Add initial LTE related settings
1. Add DB_1C_LTE 4 on DB_USB fw_config.
2. Implement WWAN power sequencing.
3. Disable LTE-related GPIOs based on fw_config.
4. Add I2C SX9324 (P-sensor) support.
Refer Schematic file: CA31AC_R10_MB_SUB_240903A_P.pdf
BUG=b:374666995
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot chromeos-bootimage
Confirm the device node i2c-STH9324:00 created correctly,
and command for # i2cdump -f -y 11 0x28 is workable.
Change-Id: Ida56ff338d82f48aef419a65830a3380c83123d5
Signed-off-by: Daniel Peng <Daniel_Peng@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84925
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/soc/intel/baytrail/lpss.c')
0 files changed, 0 insertions, 0 deletions