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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-29 16:15:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-14 19:42:27 +0200
commit77d1280d0c866a9f85e62f74c43fe8d021a4ff39 (patch)
tree2c1902f07548406e6807b68645048a47616dc8ca /src/soc/intel/baytrail/iosf.c
parent562db3bb3fa16abf6f758e97f9e5496f1c14d423 (diff)
SPI flash: Fix alignment checks in Page Program commands
There are two separate restrictions to take into account: Page Program command must not cross address boundaries defined by the flash part's page size. Total number of bytes for any command sent to flash part is restricted by the SPI controller capabilities. Consider CONTROLLER_PAGE_LIMIT=64, page_size=256, offset=62, len=4. This write would be split at offset 64 for no reason. Consider CONTROLLER_PAGE_LIMIT=40, page_size=256, offset=254, len=4. This write would not be split at page boundary as required. We do not really hit the second case. Nevertheless, CONTROLLER_PAGE_LIMIT is a misnomer for the maximum payload length supported by the SPI controller and is removed in a followup. Change-Id: I727f2e7de86a91b6a509460ff1f374acd006a0bc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6162 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/soc/intel/baytrail/iosf.c')
0 files changed, 0 insertions, 0 deletions