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authorAaron Durbin <adurbin@chromium.org>2013-12-11 17:13:10 -0800
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-10 06:31:00 +0200
commitbc5b557a814be2790d4cea4267046dd8e3fdcb72 (patch)
treec503f8d2f911e562604934fecaece9af4cef0929 /src/soc/intel/baytrail/iosf.c
parent5cc3b401d8abc394540f9e8b0c8c33cf5a26b141 (diff)
baytrail: add more iosf access functions
There's a slew of ports required to initialize baytrail's perf and power values. Therefore, add the necessary functionality in the iosf module as well as the reg_script library. BUG=chrome-os-partner:24345 BRANCH=None TEST=Built and booted. Change-Id: Id45def82f9b173abeba0e67e4055f21853e62772 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179748 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/5007 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/iosf.c')
-rw-r--r--src/soc/intel/baytrail/iosf.c120
1 files changed, 120 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c
index c3d4f0ee37..2b07e2b844 100644
--- a/src/soc/intel/baytrail/iosf.c
+++ b/src/soc/intel/baytrail/iosf.c
@@ -165,3 +165,123 @@ void iosf_scc_write(int reg, uint32_t val)
{
return iosf_write_port(IOSF_WRITE(SCC), reg, val);
}
+
+uint32_t iosf_aunit_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(AUNIT), reg);
+}
+
+void iosf_aunit_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(AUNIT), reg, val);
+}
+
+uint32_t iosf_cpu_bus_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(CPU_BUS), reg);
+}
+
+void iosf_cpu_bus_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(CPU_BUS), reg, val);
+}
+
+uint32_t iosf_sec_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(SEC), reg);
+}
+
+void iosf_sec_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(SEC), reg, val);
+}
+
+uint32_t iosf_port45_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x45), reg);
+}
+
+void iosf_port45_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x45), reg, val);
+}
+
+uint32_t iosf_port46_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x46), reg);
+}
+
+void iosf_port46_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x46), reg, val);
+}
+
+uint32_t iosf_port47_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x47), reg);
+}
+
+void iosf_port47_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x47), reg, val);
+}
+
+uint32_t iosf_port55_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x55), reg);
+}
+
+void iosf_port55_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x55), reg, val);
+}
+
+uint32_t iosf_port58_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x58), reg);
+}
+
+void iosf_port58_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x58), reg, val);
+}
+
+uint32_t iosf_port59_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x59), reg);
+}
+
+void iosf_port59_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x59), reg, val);
+}
+
+uint32_t iosf_port5a_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0x5a), reg);
+}
+
+void iosf_port5a_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0x5a), reg, val);
+}
+
+uint32_t iosf_porta2_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(0xa2), reg);
+}
+
+void iosf_porta2_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(0xa2), reg, val);
+}
+
+uint32_t iosf_ssus_read(int reg)
+{
+ return iosf_read_port(IOSF_READ(SSUS), reg);
+}
+
+void iosf_ssus_write(int reg, uint32_t val)
+{
+ return iosf_write_port(IOSF_WRITE(SSUS), reg, val);
+}