diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-14 05:41:41 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-15 06:55:59 +0000 |
commit | faf20d30a6e451d45e29613e3f4603dc72771843 (patch) | |
tree | d1c3df6e87473d66633fb3a4a8cec736fdda2cd7 /src/soc/intel/baytrail/include | |
parent | f091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (diff) |
soc/intel: Rename some SMM support functions
Rename southbridge_smm_X to smm_southbridge_X.
Rename most southcluster_smm_X to smm_southbridge_X.
Change-Id: I4f6f9207ba32cf51d75b9ca9230e38310a33a311
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34856
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/include')
-rw-r--r-- | src/soc/intel/baytrail/include/soc/smm.h | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/intel/baytrail/include/soc/smm.h b/src/soc/intel/baytrail/include/soc/smm.h index ac0910f306..29b7946467 100644 --- a/src/soc/intel/baytrail/include/soc/smm.h +++ b/src/soc/intel/baytrail/include/soc/smm.h @@ -16,6 +16,8 @@ #ifndef _BAYTRAIL_SMM_H_ #define _BAYTRAIL_SMM_H_ +#include <types.h> + /* There is a bug in the order of Kconfig includes in that arch/x86/Kconfig * is included after chipset code. This causes the chipset's Kconfig to be * clobbered by the arch/x86/Kconfig if they have the same name. */ @@ -29,17 +31,12 @@ static inline int smm_region_size(void) uintptr_t smm_region_start(void); -#if !defined(__PRE_RAM__) && !defined(__SMM___) -#include <stdint.h> -void southcluster_smm_clear_state(void); -void southcluster_smm_enable_smi(void); -void southcluster_smm_save_param(int param, uint32_t data); -#endif - enum { SMM_SAVE_PARAM_GPIO_ROUTE = 0, SMM_SAVE_PARAM_PCIE_WAKE_ENABLE, SMM_SAVE_PARAM_COUNT }; +void smm_southcluster_save_param(int param, uint32_t data); + #endif /* _BAYTRAIL_SMM_H_ */ |