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authorAaron Durbin <adurbin@chromium.org>2013-11-22 14:16:49 -0600
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-07 22:06:54 +0200
commitae31f7dcc4eb173ca4677d3a580c736dc088c5e5 (patch)
treeac3c024122be499783d0dfe80c774b0b07c1766e /src/soc/intel/baytrail/chip.h
parent5f5cd72a5589d68cb95d09eec1717577e0b782d3 (diff)
baytrail: pcie: Root port initialization
Add PCIe driver to initialize root ports. BUG=chrome-os-partner:24111 TEST=Manual on Rambi. Verify that PCIe Wifi card is detected and able to detect networks. BRANCH=None. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3c68da5f27cd162e112add488bdf5ced192b7d12 Reviewed-on: https://chromium-review.googlesource.com/177652 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4981 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/soc/intel/baytrail/chip.h')
-rw-r--r--src/soc/intel/baytrail/chip.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/chip.h b/src/soc/intel/baytrail/chip.h
index 72ef10d67b..4c8897c752 100644
--- a/src/soc/intel/baytrail/chip.h
+++ b/src/soc/intel/baytrail/chip.h
@@ -29,6 +29,7 @@ struct soc_intel_baytrail_config {
uint8_t sata_port_map;
uint8_t sata_ahci;
uint8_t ide_legacy_combined;
+ uint8_t clkreq_enable;
/* USB Port Disable mask */
uint16_t usb2_port_disable_mask;