diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-11-01 13:32:53 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-03-11 19:55:12 +0100 |
| commit | f81a91a768f54ef25aa6019fb40d3b98a3cb18c2 (patch) | |
| tree | f1da814ad34bb3cff9f76d86ed59d8f46c198756 /src/soc/intel/baytrail/chip.h | |
| parent | 97651c55a3058bfedacdeb6de6243087d1dc5b7a (diff) | |
baytrail: Add XHCI initialization
This adds required steps to initialize the XHCI controller
on the baytrail platform.
Actually using XHCI is causing lots of bad behavior including
apparent memory corruption.
BUG=chrome-os-partner:23635
BRANCH=rambi
TEST=build and boot on rambi
Change-Id: Ic43e04f4b47e107ec3bb0c387a9fc72c3cae0271
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175511
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4929
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/chip.h')
| -rw-r--r-- | src/soc/intel/baytrail/chip.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/chip.h b/src/soc/intel/baytrail/chip.h index d17474faba..38dd8068bd 100644 --- a/src/soc/intel/baytrail/chip.h +++ b/src/soc/intel/baytrail/chip.h @@ -29,6 +29,13 @@ struct soc_intel_baytrail_config { uint8_t sata_port_map; uint8_t sata_ahci; uint8_t ide_legacy_combined; + + /* USB Port Disable mask */ + uint16_t usb2_port_disable_mask; + uint16_t usb3_port_disable_mask; + + /* USB routing */ + int usb_route_to_xhci; }; extern struct chip_operations soc_intel_baytrail_ops; |