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authorArthur Heymans <arthur@aheymans.xyz>2023-08-31 17:09:28 +0200
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-10-20 14:24:57 +0000
commit0b0113f2436b448cd172d2ae9cfcc07628020173 (patch)
tree627b1a81d647e9084763dd18eaca22022bd4568c /src/soc/intel/baytrail/chip.c
parentce84a347bfa16f393e75e4cc63eded636ca69af8 (diff)
device/device.h: Rename pci_domain_scan_bus
On all targets the domain works as a host bridge. Xeon-sp code intends to feature multiple host bridges below a domain, hence rename the function to pci_host_bridge_scan_bus. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I4e65fdbaf0b42c5f4f62297a60d818d299d76f73 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78326 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/chip.c')
-rw-r--r--src/soc/intel/baytrail/chip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c
index 1f72dc4490..592e17879a 100644
--- a/src/soc/intel/baytrail/chip.c
+++ b/src/soc/intel/baytrail/chip.c
@@ -11,7 +11,7 @@
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
- .scan_bus = pci_domain_scan_bus,
+ .scan_bus = pci_host_bridge_scan_bus,
};
static struct device_operations cpu_bus_ops = {