diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-28 12:20:14 +0100 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-11-30 21:52:31 +0000 |
| commit | a783305072a34fc4402f87b1d00c7a68a4ba38f8 (patch) | |
| tree | b9805c41b55fc1d7e1e912f1ecf93d3372ebc72d /src/soc/intel/baytrail/acpi | |
| parent | cf80cda7ce088366c7320d4425298ff834fa8cf3 (diff) | |
soc/intel/baytrail: Rework acpi/cpu.asl
Use acpigen_write_processor_cnot to implement notifications to the CPU.
Change-Id: Ifb5a5c1255f9a922063293bf430e849909468eaf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29888
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/acpi')
| -rw-r--r-- | src/soc/intel/baytrail/acpi/cpu.asl | 52 |
1 files changed, 8 insertions, 44 deletions
diff --git a/src/soc/intel/baytrail/acpi/cpu.asl b/src/soc/intel/baytrail/acpi/cpu.asl index dc26e0a7e6..5c153f4a59 100644 --- a/src/soc/intel/baytrail/acpi/cpu.asl +++ b/src/soc/intel/baytrail/acpi/cpu.asl @@ -14,59 +14,23 @@ * GNU General Public License for more details. */ -/* These devices are created at runtime */ -External (\_PR.CP00, DeviceObj) -External (\_PR.CP01, DeviceObj) -External (\_PR.CP02, DeviceObj) -External (\_PR.CP03, DeviceObj) +/* These come from the dynamically created CPU SSDT */ +External (\_PR.CNOT, MethodObj) -/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ +/* Notify OS to re-read CPU tables */ Method (PNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x81) // _CST - Notify (\_PR.CP01, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x81) // _CST - Notify (\_PR.CP03, 0x81) // _CST - } + \_PR.CNOT (0x81) } -/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */ +/* Notify OS to re-read CPU _PPC limit */ Method (PPCN) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x80) // _PPC - Notify (\_PR.CP01, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x80) // _PPC - Notify (\_PR.CP03, 0x80) // _PPC - } + \_PR.CNOT (0x80) } -/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */ +/* Notify OS to re-read Throttle Limit tables */ Method (TNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x82) // _TPC - Notify (\_PR.CP01, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x82) // _TPC - Notify (\_PR.CP03, 0x82) // _TPC - } -} - -/* Return a package containing enabled processor entries */ -Method (PPKG) -{ - If (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) - } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CP00, \_PR.CP01}) - } Else { - Return (Package() {\_PR.CP00}) - } + \_PR.CNOT (0x82) } |