diff options
| author | Ted Kuo <tedkuo@ami.com.tw> | 2014-09-16 15:31:21 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-02 13:29:42 +0200 |
| commit | 6ecaf65bffde68d60a53aeeeb62db43c4fa6c5c9 (patch) | |
| tree | 5630dfe14d33ac08ada28cb8dd3ac89318bfe688 /src/soc/intel/baytrail/acpi/southcluster.asl | |
| parent | ffc2a3b59b96961a174cdc02f920431ccdc4e302 (diff) | |
Baytrail: add _PRT to each PCIe root port device
Report PCI routing table of all PCIe root ports for legacy interrupt.
Some PCIe devices using legacy interrupt can't work if PCI routing table
isn't defined. It's necessary and defined in BWG Chapter 28.1.3.
BUG=chrome-os-partner:31943
TEST=compiled and tested
BRANCH=NONE
Signed-off-by: Ted Kuo <tedkuo@ami.com.tw>
Change-Id: I2c684edfd1fc624bed471783584250cd9f5e66f5
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: b9040d564a32607327057a84b9aab14e66cd5b45
Original-Change-Id: Ia15ced6c5fdcc6712e5f2831e42c6dee320f166b
Original-Reviewed-on: https://chromium-review.googlesource.com/218422
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Ted Kuo <tedkuo@ami.com.tw>
Original-Commit-Queue: Ted Kuo <tedkuo@ami.com.tw>
Original-Tested-by: Ted Kuo <tedkuo@ami.com.tw>
Reviewed-on: http://review.coreboot.org/9201
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/acpi/southcluster.asl')
| -rw-r--r-- | src/soc/intel/baytrail/acpi/southcluster.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index 5382182659..354515ba67 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -254,6 +254,9 @@ Device (IOSF) // IRQ routing for each PCI device #include "irqroute.asl" +// PCI Express Ports 0:1c.x +#include "pcie.asl" + Scope (\_SB) { // GPIO Devices |