diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-15 12:51:51 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-29 17:34:12 +0000 |
commit | 179da7fb5cff3c9034dc3203086c84342560c600 (patch) | |
tree | a0ee100f05dd58d34f1412923227c86088edd696 /src/soc/intel/baytrail/Makefile.inc | |
parent | 6229cc93ff16a5a9a424a0323fd631c8b3e1c943 (diff) |
soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCK
This moves programming BAR's and setting up console in the bootblock.
Change-Id: I062461cb7bfba2c4df4c20707ecda32f9857b164
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36873
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/Makefile.inc')
-rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 2c49c63454..1769b53085 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -9,14 +9,19 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common +all-y += tsc_freq.c + +bootblock-y += ../../../cpu/intel/car/non-evict/cache_as_ram.S +bootblock-y += ../../../cpu/intel/car/bootblock.c +bootblock-y += ../../../cpu/x86/early_reset.S +bootblock-y += bootblock/bootblock.c + romstage-y += iosf.c romstage-y += memmap.c romstage-y += pmutil.c -romstage-y += tsc_freq.c postcar-y += iosf.c postcar-y += memmap.c -postcar-y += tsc_freq.c ramstage-y += acpi.c ramstage-y += chip.c @@ -41,7 +46,6 @@ ramstage-y += scc.c ramstage-y += sd.c ramstage-y += smm.c ramstage-y += southcluster.c -ramstage-y += tsc_freq.c ramstage-y += xhci.c ramstage-$(CONFIG_ELOG) += elog.c ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c |